1. Field
Exemplary embodiments of the present invention relate to a semiconductor device and a test system including the same.
2. Description of the Related Art
FIG. 1 is a configuration diagram of a conventional test system.
Referring to FIG. 1, the test system may include a plurality of semiconductor devices 110_1 to 110_n and a test device 120 for testing the plurality of semiconductor devices 110_1 to 110_n.
Each of the plurality of semiconductor devices 110_1 to 110_n may include a first pad P1 for receiving a first voltage VCCE and a second pad P2 for receiving a second voltage VCCQ. A plurality of internal circuits (not illustrated in FIG. 1) included in the plurality of semiconductor devices 110_1 to 110_n may operate by employing one of the first voltage VCCE received through the first pad P1 and the second voltage VCCQ received through the second pad P2.
The test device 120 may include a plurality of voltage pads VP1 to VPn. Each of the plurality of voltage pads VP1 to VPn may be coupled to one of the first and second pads P1 and P2 of the semiconductor device and may supply a voltage required for an operation of the semiconductor device during a test operation.
For a normal test operation of semiconductor devices, it is necessary to supply all the first and second voltages VCCE and VCCQ to each semiconductor device. To this end, at least two voltage pads of the test device 120 should be allocated for each semiconductor device. Therefore, the test device 120 having the n voltage pads should test the n semiconductor devices 110_1 to 110_n at least twice because it is not possible to test them all at a single time.